Bridging the Gap Between Advanced AI and Flight-Ready Silicon

My Mission

My mission is to redefine the boundaries of autonomous aviation by mastering the hardware that powers intelligence. I am dedicated to transforming high-level AI research into certified, ruggedized, and efficient silicon realities. By focusing on the intersection of ASIC design and aerospace rigor, I strive to provide the ‘brain’ for the next generation of intelligent aircraft—ensuring that the future of flight is not only smarter but inherently safer.

Core Research Pillars

1. High-Performance Deterministic AI

“My research focuses on making Artificial Intelligence predictable enough for safety-critical environments. I investigate architectures that eliminate the ‘black box’ nature of neural networks by implementing deterministic execution paths at the silicon level. This ensures that AI-driven decisions are consistent, auditable, and fully compliant with DO-254 certification requirements.”

2. Advanced Thermal & SWaP-C Optimization

A significant part of my work is dedicated to solving the physical limits of embedded computing. I research innovative conduction-cooling techniques and power-management strategies for ASICs within scalable and modular systems. My goal is to maximize ‘Intelligence per Gram,’ allowing small-scale platforms to execute complex missions that previously required large-scale servers.

The Silicon Transition: From FPGA to ASIC

I am deeply involved in the methodology of migrating complex logic from flexible FPGAs to high-efficiency custom ASICs. This research is vital for the industry’s shift toward edge computing, where I analyze trade-offs in latency, reliability, and manufacturing costs to deliver the most optimized hardware lifecycle for aerospace integrators.